Stacking memory architecture exploration for three-dimensional integrated circuit in 3-D PAC

Hsien-Ching Hsieh, Po-Han Huang, Chi-Hung Lin, Huang-Lun Lin. Stacking memory architecture exploration for three-dimensional integrated circuit in 3-D PAC. In IEEE 25th International SOC Conference, SOCC 2012, Niagara Falls, NY, USA, September 12-14, 2012. pages 317-321, IEEE, 2012. [doi]

Abstract

Abstract is missing.