Sung-En Hsieh, Chen-Che Kao, Chih-Cheng Hsieh. A 0.5-V 12-bit SAR ADC Using Adaptive Time-Domain Comparator With Noise Optimization. J. Solid-State Circuits, 53(10):2763-2771, 2018. [doi]
@article{HsiehKH18,
title = {A 0.5-V 12-bit SAR ADC Using Adaptive Time-Domain Comparator With Noise Optimization},
author = {Sung-En Hsieh and Chen-Che Kao and Chih-Cheng Hsieh},
year = {2018},
doi = {10.1109/JSSC.2018.2862880},
url = {https://doi.org/10.1109/JSSC.2018.2862880},
researchr = {https://researchr.org/publication/HsiehKH18},
cites = {0},
citedby = {0},
journal = {J. Solid-State Circuits},
volume = {53},
number = {10},
pages = {2763-2771},
}