Automating Formal Modular Verification of Asynchronous Real-Time Embedded Systems

Pao-Ann Hsiung, Shu-Yu Cheng. Automating Formal Modular Verification of Asynchronous Real-Time Embedded Systems. In 16th International Conference on VLSI Design (VLSI Design 2003), 4-8 January 2003, New Delhi, India. pages 249-254, IEEE Computer Society, 2003. [doi]

References

No references recorded for this publication.

Cited by

No citations of this publication recorded.