An efficient IP-level power model for complex digital circuits

Chih-Yang Hsu, Chien-Nan Jimmy Liu, Jing-Yang Jou. An efficient IP-level power model for complex digital circuits. In Hiroto Yasuura, editor, Proceedings of the 2003 Asia and South Pacific Design Automation Conference, ASP-DAC '03, Kitakyushu, Japan, January 21-24, 2003. pages 610-613, ACM, 2003. [doi]

Authors

Chih-Yang Hsu

This author has not been identified. Look up 'Chih-Yang Hsu' in Google

Chien-Nan Jimmy Liu

This author has not been identified. Look up 'Chien-Nan Jimmy Liu' in Google

Jing-Yang Jou

This author has not been identified. Look up 'Jing-Yang Jou' in Google