A 0.6V 6.4fJ/conversion-step 10-bit 150MS/s subranging SAR ADC in 40nm CMOS

Yao-Sheng Hu, Chi-Huai Shih, Hung-Yen Tai, Hung-Wei Chen, Hsin-Shu Chen. A 0.6V 6.4fJ/conversion-step 10-bit 150MS/s subranging SAR ADC in 40nm CMOS. In IEEE Asian Solid-State Circuits Conference, A-SSCC 2014, KaoHsiung, Taiwan, November 10-12, 2014. pages 81-84, IEEE, 2014. [doi]

@inproceedings{HuSTCC14,
  title = {A 0.6V 6.4fJ/conversion-step 10-bit 150MS/s subranging SAR ADC in 40nm CMOS},
  author = {Yao-Sheng Hu and Chi-Huai Shih and Hung-Yen Tai and Hung-Wei Chen and Hsin-Shu Chen},
  year = {2014},
  doi = {10.1109/ASSCC.2014.7008865},
  url = {http://dx.doi.org/10.1109/ASSCC.2014.7008865},
  researchr = {https://researchr.org/publication/HuSTCC14},
  cites = {0},
  citedby = {0},
  pages = {81-84},
  booktitle = {IEEE Asian Solid-State Circuits Conference, A-SSCC 2014, KaoHsiung, Taiwan, November 10-12, 2014},
  publisher = {IEEE},
  isbn = {978-1-4799-4090-5},
}