Bo Hu, Jingxiang Tian, Mustafa M. Shihab, Gaurav Rajavendra Reddy, William Swartz, Yiorgos Makris, Benjamin Carrión Schäfer, Carl Sechen. Functional Obfuscation of Hardware Accelerators through Selective Partial Design Extraction onto an Embedded FPGA. In Houman Homayoun, Baris Taskin, Tinoosh Mohsenin, Weisheng Zhao, editors, Proceedings of the 2019 on Great Lakes Symposium on VLSI, GLSVLSI 2019, Tysons Corner, VA, USA, May 9-11, 2019. pages 171-176, ACM, 2019. [doi]
@inproceedings{HuTSRSMSS19,
title = {Functional Obfuscation of Hardware Accelerators through Selective Partial Design Extraction onto an Embedded FPGA},
author = {Bo Hu and Jingxiang Tian and Mustafa M. Shihab and Gaurav Rajavendra Reddy and William Swartz and Yiorgos Makris and Benjamin Carrión Schäfer and Carl Sechen},
year = {2019},
doi = {10.1145/3299874.3317992},
url = {https://doi.org/10.1145/3299874.3317992},
researchr = {https://researchr.org/publication/HuTSRSMSS19},
cites = {0},
citedby = {0},
pages = {171-176},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, GLSVLSI 2019, Tysons Corner, VA, USA, May 9-11, 2019},
editor = {Houman Homayoun and Baris Taskin and Tinoosh Mohsenin and Weisheng Zhao},
publisher = {ACM},
isbn = {978-1-4503-6252-8},
}