Event Ordering Condition for Correct Executions in Shared-Memory Systems

Weiwu Hu, Peisu Xia. Event Ordering Condition for Correct Executions in Shared-Memory Systems. In 1996 International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN 96), June 12-14, 1996, Beijing, China. pages 84-89, IEEE Computer Society, 1996. [doi]

Authors

Weiwu Hu

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Peisu Xia

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