Juinn-Dar Huang, Yi-Hang Chen, Jia-Shin Lu. Defect-aware synthesis for reconfigurable single-electron transistor arrays. In 2017 IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Abu Dhabi, United Arab Emirates, October 23-25, 2017. pages 1-6, IEEE, 2017. [doi]
Abstract is missing.