55nm CMOS 12-bit 250MHz digital-to-analog converter with dynamic voltage scaling (DVS) technique through single-inductor dual-output (SIDO) converter

Tzu-Chi Huang, Wen-Shen Chou, Yu-Huei Lee, Yao-Yi Yang, Ke-Horng Chen, Yung-Chow Peng, Fu-Lung Hsueh. 55nm CMOS 12-bit 250MHz digital-to-analog converter with dynamic voltage scaling (DVS) technique through single-inductor dual-output (SIDO) converter. In Proceedings of the 37th European Solid-State Circuits Conference, ESSCIRC 2011, Helsinki, Finland, Sept. 12-16, 2011. pages 383-386, IEEE, 2011. [doi]

Authors

Tzu-Chi Huang

This author has not been identified. Look up 'Tzu-Chi Huang' in Google

Wen-Shen Chou

This author has not been identified. Look up 'Wen-Shen Chou' in Google

Yu-Huei Lee

This author has not been identified. Look up 'Yu-Huei Lee' in Google

Yao-Yi Yang

This author has not been identified. Look up 'Yao-Yi Yang' in Google

Ke-Horng Chen

This author has not been identified. Look up 'Ke-Horng Chen' in Google

Yung-Chow Peng

This author has not been identified. Look up 'Yung-Chow Peng' in Google

Fu-Lung Hsueh

This author has not been identified. Look up 'Fu-Lung Hsueh' in Google