A 1.2-GS/s 8-bit two-step SAR ADC in 65-nm CMOS with passive residue transfer - researchr publication

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Hai Huang, Ling Du, Yun Chiu. A 1.2-GS/s 8-bit two-step SAR ADC in 65-nm CMOS with passive residue transfer. In IEEE Asian Solid-State Circuits Conference, A-SSCC 2015, Xia'men, China, November 9-11, 2015. pages 1-4, IEEE, 2015. [doi]

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