Vertical Channel-All-Around (CAA) IGZO FET under 50 nm CD with High Read Current of 32.8 μA/μm (Vth + 1 V), Well-performed Thermal Stability up to 120 ℃ for Low Latency, High-density 2T0C 3D DRAM Application

Kailiang Huang, Xinlv Duan, Junxiao Feng, Ying Sun, Congyan Lu, Chuanke Chen, Guangfan Jiao, Xinpeng Lin, Jinhai Shao, Shihui Yin, Jiazhen Sheng, Zhaogui Wang, Wenqiang Zhang, Xichen Chuai, Jiebin Niu, Wenwu Wang, Ying Wu, Weiliang Jing, Zhengbo Wang, Jeffrey Xu, Guanhua Yang, Di Geng, Ling Li, Ming Liu. Vertical Channel-All-Around (CAA) IGZO FET under 50 nm CD with High Read Current of 32.8 μA/μm (Vth + 1 V), Well-performed Thermal Stability up to 120 ℃ for Low Latency, High-density 2T0C 3D DRAM Application. In IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022. pages 296-297, IEEE, 2022. [doi]

@inproceedings{HuangDFSLCJLSYS22,
  title = {Vertical Channel-All-Around (CAA) IGZO FET under 50 nm CD with High Read Current of 32.8 μA/μm (Vth + 1 V), Well-performed Thermal Stability up to 120 ℃ for Low Latency, High-density 2T0C 3D DRAM Application},
  author = {Kailiang Huang and Xinlv Duan and Junxiao Feng and Ying Sun and Congyan Lu and Chuanke Chen and Guangfan Jiao and Xinpeng Lin and Jinhai Shao and Shihui Yin and Jiazhen Sheng and Zhaogui Wang and Wenqiang Zhang and Xichen Chuai and Jiebin Niu and Wenwu Wang and Ying Wu and Weiliang Jing and Zhengbo Wang and Jeffrey Xu and Guanhua Yang and Di Geng and Ling Li and Ming Liu},
  year = {2022},
  doi = {10.1109/VLSITechnologyandCir46769.2022.9830271},
  url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830271},
  researchr = {https://researchr.org/publication/HuangDFSLCJLSYS22},
  cites = {0},
  citedby = {0},
  pages = {296-297},
  booktitle = {IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
  publisher = {IEEE},
  isbn = {978-1-6654-9772-5},
}