Mu-lee Huang, Chung-Chih Hung. Full-custom all-digital phase locked loop for clock generation. In VLSI Design, Automation and Test, VLSI-DAT 2015, Hsinchu, Taiwan, April 27-29, 2015. pages 1-4, IEEE, 2015. [doi]
@inproceedings{HuangH15-9,
title = {Full-custom all-digital phase locked loop for clock generation},
author = {Mu-lee Huang and Chung-Chih Hung},
year = {2015},
doi = {10.1109/VLSI-DAT.2015.7114567},
url = {http://dx.doi.org/10.1109/VLSI-DAT.2015.7114567},
researchr = {https://researchr.org/publication/HuangH15-9},
cites = {0},
citedby = {0},
pages = {1-4},
booktitle = {VLSI Design, Automation and Test, VLSI-DAT 2015, Hsinchu, Taiwan, April 27-29, 2015},
publisher = {IEEE},
isbn = {978-1-4799-6275-4},
}