Jhin-Fang Huang, Wen Cheng Lai, Wei-Jian Lin. A time-interleaved pipelined ADC chip design for 4-G application. In 2013 6th IEEE/International Conference on Advanced Infocomm Technology, ICAIT 2013, Hsinchu, Taiwan, July 6-9, 2013. pages 104-108, IEEE, 2013. [doi]
@inproceedings{HuangLL13-1,
title = {A time-interleaved pipelined ADC chip design for 4-G application},
author = {Jhin-Fang Huang and Wen Cheng Lai and Wei-Jian Lin},
year = {2013},
doi = {10.1109/ICAIT.2013.6621509},
url = {http://dx.doi.org/10.1109/ICAIT.2013.6621509},
researchr = {https://researchr.org/publication/HuangLL13-1},
cites = {0},
citedby = {0},
pages = {104-108},
booktitle = {2013 6th IEEE/International Conference on Advanced Infocomm Technology, ICAIT 2013, Hsinchu, Taiwan, July 6-9, 2013},
publisher = {IEEE},
}