A time-interleaved pipelined ADC chip design for 4-G application

Jhin-Fang Huang, Wen Cheng Lai, Wei-Jian Lin. A time-interleaved pipelined ADC chip design for 4-G application. In 2013 6th IEEE/International Conference on Advanced Infocomm Technology, ICAIT 2013, Hsinchu, Taiwan, July 6-9, 2013. pages 104-108, IEEE, 2013. [doi]

Abstract

Abstract is missing.