A Simulator for Evaluating Redundancy Analysis Algorithms of Repairable Embedded Memories

Rei-Fu Huang, Jin-Fu Li, Jen-Chieh Yeh, Cheng-Wen Wu. A Simulator for Evaluating Redundancy Analysis Algorithms of Repairable Embedded Memories. In 10th IEEE International Workshop on Memory Technology, Design, and Testing (MTDT 2002), 10-12 July 2002, Isle of Bendor, France. pages 68, IEEE Computer Society, 2002. [doi]

Authors

Rei-Fu Huang

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Jin-Fu Li

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Jen-Chieh Yeh

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Cheng-Wen Wu

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