A BIST Scheme for On-Chip ADC and DAC Testing

Jiun-Lang Huang, Chee-Kian Ong, Kwang-Ting Cheng. A BIST Scheme for On-Chip ADC and DAC Testing. In 2000 Design, Automation and Test in Europe (DATE 2000), 27-30 March 2000, Paris, France. pages 216-220, IEEE Computer Society, 2000. [doi]

Authors

Jiun-Lang Huang

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Chee-Kian Ong

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Kwang-Ting Cheng

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