Renqiu Huang, Ranga Vemuri. PAHLS: Towards Run-Time Synthesis for FPGAs. In Tero Rissa, Steven J. E. Wilton, Philip Heng Wai Leong, editors, Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), Tampere, Finland, August 24-26, 2005. pages 739-740, IEEE, 2005.
@inproceedings{HuangV05:1,
title = {PAHLS: Towards Run-Time Synthesis for FPGAs},
author = {Renqiu Huang and Ranga Vemuri},
year = {2005},
researchr = {https://researchr.org/publication/HuangV05%3A1},
cites = {0},
citedby = {0},
pages = {739-740},
booktitle = {Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), Tampere, Finland, August 24-26, 2005},
editor = {Tero Rissa and Steven J. E. Wilton and Philip Heng Wai Leong},
publisher = {IEEE},
isbn = {0-7803-9362-7},
}