Partial Flattening: A Compilation Technique for Irregular Nested Parallelism on GPGPUs

Ming-Hsiang Huang, Wuu Yang. Partial Flattening: A Compilation Technique for Irregular Nested Parallelism on GPGPUs. In 45th International Conference on Parallel Processing, ICPP 2016, Philadelphia, PA, USA, August 16-19, 2016. pages 552-561, IEEE Computer Society, 2016. [doi]

Authors

Ming-Hsiang Huang

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Wuu Yang

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