Ming-Hsiang Huang, Wuu Yang. Partial Flattening: A Compilation Technique for Irregular Nested Parallelism on GPGPUs. In 45th International Conference on Parallel Processing, ICPP 2016, Philadelphia, PA, USA, August 16-19, 2016. pages 552-561, IEEE Computer Society, 2016. [doi]
@inproceedings{HuangY16-9,
title = {Partial Flattening: A Compilation Technique for Irregular Nested Parallelism on GPGPUs},
author = {Ming-Hsiang Huang and Wuu Yang},
year = {2016},
doi = {10.1109/ICPP.2016.70},
url = {http://doi.ieeecomputersociety.org/10.1109/ICPP.2016.70},
researchr = {https://researchr.org/publication/HuangY16-9},
cites = {0},
citedby = {0},
pages = {552-561},
booktitle = {45th International Conference on Parallel Processing, ICPP 2016, Philadelphia, PA, USA, August 16-19, 2016},
publisher = {IEEE Computer Society},
isbn = {978-1-5090-2823-8},
}