Fast dynamic and partial reconfiguration data path with low hardware overhead on Xilinx FPGAs - researchr publication related

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Michael Hübner, Diana Göhringer, Juanjo Noguera, Jürgen Becker. Fast dynamic and partial reconfiguration data path with low hardware overhead on Xilinx FPGAs. In 24th IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2010, Atlanta, Georgia, USA, 19-23 April 2010 - Workshop Proceedings. pages 1-8, IEEE, 2010. [doi]

The following publications are possibly variants of this publication:

Partial and Dynamically Reconfiguration of Xilinx Virtex-II FPGAsBrandon Blodget, Christophe Bobda, Michael Hübner, Adronis Niyonkuru. fpl 2004: 801-810 [doi]

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