A Survey of Low-voltage Low-Power Techniques and Challenges for CMOS Digital Circuits

Yu-Cherng Hung, Shao-Hui Shieh, Chiou-Kou Tung. A Survey of Low-voltage Low-Power Techniques and Challenges for CMOS Digital Circuits. Journal of Circuits, Systems, and Computers, 20(1):89-105, 2011. [doi]

Authors

Yu-Cherng Hung

This author has not been identified. Look up 'Yu-Cherng Hung' in Google

Shao-Hui Shieh

This author has not been identified. Look up 'Shao-Hui Shieh' in Google

Chiou-Kou Tung

This author has not been identified. Look up 'Chiou-Kou Tung' in Google