A Survey of Low-voltage Low-Power Techniques and Challenges for CMOS Digital Circuits

Yu-Cherng Hung, Shao-Hui Shieh, Chiou-Kou Tung. A Survey of Low-voltage Low-Power Techniques and Challenges for CMOS Digital Circuits. Journal of Circuits, Systems, and Computers, 20(1):89-105, 2011. [doi]

@article{HungST11,
  title = {A Survey of Low-voltage Low-Power Techniques and Challenges for CMOS Digital Circuits},
  author = {Yu-Cherng Hung and Shao-Hui Shieh and Chiou-Kou Tung},
  year = {2011},
  doi = {10.1142/S0218126611007104},
  url = {http://dx.doi.org/10.1142/S0218126611007104},
  tags = {survey},
  researchr = {https://researchr.org/publication/HungST11},
  cites = {0},
  citedby = {0},
  journal = {Journal of Circuits, Systems, and Computers},
  volume = {20},
  number = {1},
  pages = {89-105},
}