Seung H. Hwang, Gwan S. Choi. On-Chip Cache Memory Resilience. In 3rd IEEE International Symposium on High-Assurance Systems Engineering (HASE 98), 13-14 November 1998, Washington, D.C, USA, Proceedings. pages 240-247, IEEE Computer Society, 1998. [doi]
@inproceedings{HwangC98:1,
title = {On-Chip Cache Memory Resilience},
author = {Seung H. Hwang and Gwan S. Choi},
year = {1998},
url = {http://dlib.computer.org/conferen/hase/9221/pdf/92210240.pdf},
tags = {caching},
researchr = {https://researchr.org/publication/HwangC98%3A1},
cites = {0},
citedby = {0},
pages = {240-247},
booktitle = {3rd IEEE International Symposium on High-Assurance Systems Engineering (HASE 98), 13-14 November 1998, Washington, D.C, USA, Proceedings},
publisher = {IEEE Computer Society},
isbn = {0-8186-9221-9},
}