Chi-Yi Hwang, Yung-Ching Hsieh, Youn-Long Lin, Yu-Chin Hsu. An optimal transistor-chaining algorithm for CMOS cell layout. In 1989 IEEE International Conference on Computer-Aided Design, ICCAD 1989, Santa Clara, CA, USA, November 5-9, 1989. Digest of Technical Papers. pages 344-347, IEEE, 1989. [doi]
@inproceedings{HwangHLH89, title = {An optimal transistor-chaining algorithm for CMOS cell layout}, author = {Chi-Yi Hwang and Yung-Ching Hsieh and Youn-Long Lin and Yu-Chin Hsu}, year = {1989}, doi = {10.1109/ICCAD.1989.76967}, url = {http://dx.doi.org/10.1109/ICCAD.1989.76967}, researchr = {https://researchr.org/publication/HwangHLH89}, cites = {0}, citedby = {0}, pages = {344-347}, booktitle = {1989 IEEE International Conference on Computer-Aided Design, ICCAD 1989, Santa Clara, CA, USA, November 5-9, 1989. Digest of Technical Papers}, publisher = {IEEE}, isbn = {0-8186-1986-4}, }