Low Voltage and Low Power Divide-By-2/3 Counter Design Using Pass Transistor Logic Circuit Technique

Yin-Tsung Hwang, Jin-Fa Lin. Low Voltage and Low Power Divide-By-2/3 Counter Design Using Pass Transistor Logic Circuit Technique. IEEE Trans. VLSI Syst., 20(9):1738-1742, 2012. [doi]

@article{HwangL12-0,
  title = {Low Voltage and Low Power Divide-By-2/3 Counter Design Using Pass Transistor Logic Circuit Technique},
  author = {Yin-Tsung Hwang and Jin-Fa Lin},
  year = {2012},
  doi = {10.1109/TVLSI.2011.2161598},
  url = {http://dx.doi.org/10.1109/TVLSI.2011.2161598},
  researchr = {https://researchr.org/publication/HwangL12-0},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. VLSI Syst.},
  volume = {20},
  number = {9},
  pages = {1738-1742},
}