6th Annual Workshop on Interaction between Compilers and Computer Architecture (INTERACT-6 2002), 3 February 2002, Boston, MA, USA - researchr publication

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6th Annual Workshop on Interaction between Compilers and Computer Architecture (INTERACT-6 2002), 3 February 2002, Boston, MA, USA. IEEE Computer Society, 2002.

Conference: IEEEinteract2002

Abstract is missing.

Compiling for Fine-Grain Concurrency: Planning and Performing Software Thread IntegrationAlexander G. Dean. 3-14 [doi]

Dynamically Scheduling VLIW Instructions with Dependency InformationSunghyun Jee, Kannappan Palaniappan. 15 [doi]

Accuracy of Profile Maintenance in Optimizing CompilersYoufeng Wu. 27-38 [doi]

Mastering Startup Costs in Assembler-Based Compiled Instruction-Set SimulationRonan Amicel, François Bodin. 39-44 [doi]

On the Predictability of Program Behavior Using Different Input Data SetsWei-Chung Hsu, Howard Chen, Pen-Chung Yew, Dong-yuan Chen. 45 [doi]

Quantitative Evaluation of the Register Stack Engine and Optimizations for Future Itanium ProcessorsR. David Weldon, Steven S. Chang, Hong Wang 0003, Gerolf Hoflehner, Perry H. Wang, Daniel M. Lavery, John Paul Shen. 57-67 [doi]

A Study on Data Allocation of On-Chip Dual Memory BanksJeonghun Cho, Jinhwan Kim, Yunheung Paek. 68 [doi]

Code Size Efficiency in Global Scheduling for ILP ProcessorsHuiyang Zhou, Thomas M. Conte. 79-90 [doi]

Code Compression by Register Operand DependencyKelvin Lin, Jean Jyh-Jiun Shann, Chung-Ping Chung. 91-101 [doi]

Code Cache Management Schemes for Dynamic OptimizersKim M. Hazelwood, Michael D. Smith. 102-110 [doi]

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