Fast spiking neural network architecture for low-cost FPGA devices

Taras Iakymchuk, Alfredo Rosado, José V. Francés, Manuel Batallre. Fast spiking neural network architecture for low-cost FPGA devices. In Leandro Soares Indrusiak, Guy Gogniat, Nikolaos S. Voros, editors, 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), York, United Kingdom, July 9-11, 2012. pages 1-6, IEEE, 2012. [doi]

Authors

Taras Iakymchuk

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Alfredo Rosado

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José V. Francés

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Manuel Batallre

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