Low Power Semi-systolic Architectures for Polynomial-Basis Multiplication over GF(2 m ) Using Progressive Multiplier Reduction

Atef Ibrahim, Fayez Gebali. Low Power Semi-systolic Architectures for Polynomial-Basis Multiplication over GF(2 m ) Using Progressive Multiplier Reduction. VLSI Signal Processing, 82(3):331-343, 2016. [doi]

Abstract

Abstract is missing.