Motoi Ichihashi, Hélène Lhermet, Edith Beigné, Frédéric Rothan, Marc Belleville, Amara Amara. An On-Chip Multi-mode Buck DC-DC Converter for Fine-Grain DVS on a Multi-power Domain SoC Using a 65-nm Standard CMOS Logic Process. In José C. Monteiro, Rene van Leuken, editors, Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 19th International Workshop, PATMOS 2009, Delft, The Netherlands, September 9-11, 2009, Revised Selected Papers. Volume 5953 of Lecture Notes in Computer Science, pages 336-346, Springer, 2009. [doi]
Abstract is missing.