Motoi Ichihashi, Haruki Toda. Performance Measurement and Improvement of Asymmetric Three-Tr. Cell (ATC) DRAM toward 0.3V Memory Array Operation. In 19th International Conference on VLSI Design (VLSI Design 2006), 3-7 January 2006, Hyderabad, India. pages 487-490, IEEE Computer Society, 2006. [doi]
@inproceedings{IchihashiT06,
title = {Performance Measurement and Improvement of Asymmetric Three-Tr. Cell (ATC) DRAM toward 0.3V Memory Array Operation},
author = {Motoi Ichihashi and Haruki Toda},
year = {2006},
doi = {10.1109/VLSID.2006.132},
url = {http://doi.ieeecomputersociety.org/10.1109/VLSID.2006.132},
researchr = {https://researchr.org/publication/IchihashiT06},
cites = {0},
citedby = {0},
pages = {487-490},
booktitle = {19th International Conference on VLSI Design (VLSI Design 2006), 3-7 January 2006, Hyderabad, India},
publisher = {IEEE Computer Society},
isbn = {0-7695-2502-4},
}