5-Gb/s PAM4 Transmitter IC Using Compensation Circuit in an 180-nm CMOS

Yudai Ichii, Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine. 5-Gb/s PAM4 Transmitter IC Using Compensation Circuit in an 180-nm CMOS. In International Conference on Electronics, Information, and Communication, ICEIC 2021, Jeju, South Korea, January 31 - February 3, 2021. pages 1-4, IEEE, 2021. [doi]

Abstract

Abstract is missing.