A Genuine Power-Gatable Reconfigurable Logic Chip with FeRAM Cells

Masahiro Iida, Masahiro Koga, Kazuki Inoue, Motoki Amagasaki, Yoshinobu Ichida, Mitsuro Saji, Jun Iida, Toshinori Sueyoshi. A Genuine Power-Gatable Reconfigurable Logic Chip with FeRAM Cells. IEICE Transactions, 94-C(4):548-556, 2011. [doi]

@article{IidaKIAISIS11,
  title = {A Genuine Power-Gatable Reconfigurable Logic Chip with FeRAM Cells},
  author = {Masahiro Iida and Masahiro Koga and Kazuki Inoue and Motoki Amagasaki and Yoshinobu Ichida and Mitsuro Saji and Jun Iida and Toshinori Sueyoshi},
  year = {2011},
  url = {http://search.ieice.org/bin/summary.php?id=e94-c_4_548},
  tags = {logic},
  researchr = {https://researchr.org/publication/IidaKIAISIS11},
  cites = {0},
  citedby = {0},
  journal = {IEICE Transactions},
  volume = {94-C},
  number = {4},
  pages = {548-556},
}