A 950μW 5.5-GHz low voltage PLL with digitally-calibrated ILFD and linearized varactor

Sho Ikeda, Tatsuya Kamimura, Sang-yeop Lee, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu. A 950μW 5.5-GHz low voltage PLL with digitally-calibrated ILFD and linearized varactor. In 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014, Singapore, January 20-23, 2014. pages 23-24, IEEE, 2014. [doi]

@inproceedings{IkedaKLIIM14,
  title = {A 950μW 5.5-GHz low voltage PLL with digitally-calibrated ILFD and linearized varactor},
  author = {Sho Ikeda and Tatsuya Kamimura and Sang-yeop Lee and Hiroyuki Ito and Noboru Ishihara and Kazuya Masu},
  year = {2014},
  doi = {10.1109/ASPDAC.2014.6742855},
  url = {http://dx.doi.org/10.1109/ASPDAC.2014.6742855},
  researchr = {https://researchr.org/publication/IkedaKLIIM14},
  cites = {0},
  citedby = {0},
  pages = {23-24},
  booktitle = {19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014, Singapore, January 20-23, 2014},
  publisher = {IEEE},
}