Layout optimizations to decrease internal power and area in digital CMOS standard cells

Jordan Innocenti, F. Julien, Jean Michel Portal, Laurent Lopez, Q. Hubert, Pascal Masson, J. Sonzogni, S. Niel, Arnaud Régnier. Layout optimizations to decrease internal power and area in digital CMOS standard cells. In Petar Biljanovic, Zeljko Butkovic, Karolj Skala, Branko Mikac, Marina Cicin-Sain, Vlado Sruk, Slobodan Ribaric, Stjepan Gros, Boris Vrdoljak, Mladen Mauher, Andrej Sokolic, editors, 38th International Convention on Information and Communication Technology, Electronics and Microelectronics, MIPRO 2015, Opatija, Croatia, May 25-29, 2015. pages 1582-1587, IEEE, 2015. [doi]

Abstract

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