Accelerating concurrent fault simulation by parallel pattern emptiness checking of fault lists

Yukio Ishibashi, Masahiro Nagamatsu, Torao Yanaru. Accelerating concurrent fault simulation by parallel pattern emptiness checking of fault lists. Systems and Computers in Japan, 28(12):53-64, 1997. [doi]

@article{IshibashiNY97,
  title = {Accelerating concurrent fault simulation by parallel pattern emptiness checking of fault lists},
  author = {Yukio Ishibashi and Masahiro Nagamatsu and Torao Yanaru},
  year = {1997},
  doi = {10.1002/(SICI)1520-684X(19971115)28:12<53::AID-SCJ6>3.0.CO;2-C},
  url = {http://dx.doi.org/10.1002/(SICI)1520-684X(19971115)28:12<53::AID-SCJ6>3.0.CO;2-C},
  researchr = {https://researchr.org/publication/IshibashiNY97},
  cites = {0},
  citedby = {0},
  journal = {Systems and Computers in Japan},
  volume = {28},
  number = {12},
  pages = {53-64},
}