A low-power FPGA based on autonomous fine-grain power-gating

Shota Ishihara, Masanori Hariyama, Michitaka Kameyama. A low-power FPGA based on autonomous fine-grain power-gating. In Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009. pages 119-120, IEEE, 2009. [doi]

@inproceedings{IshiharaHK09,
  title = {A low-power FPGA based on autonomous fine-grain power-gating},
  author = {Shota Ishihara and Masanori Hariyama and Michitaka Kameyama},
  year = {2009},
  doi = {10.1145/1509633.1509670},
  url = {http://doi.acm.org/10.1145/1509633.1509670},
  tags = {rule-based},
  researchr = {https://researchr.org/publication/IshiharaHK09},
  cites = {0},
  citedby = {0},
  pages = {119-120},
  booktitle = {Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009},
  publisher = {IEEE},
  isbn = {978-1-4244-2748-2},
}