K. Ito, D. Suzuki. A high-level synthesis method for simultaneous placement and scheduling considering data communication delay. In IEEE Asia Pacific Conference on Circuits and Systems 2002, APCCAS 2002, Singapore, 16-18 December 2002. pages 149-154, IEEE, 2002. [doi]
@inproceedings{ItoS02,
title = {A high-level synthesis method for simultaneous placement and scheduling considering data communication delay},
author = {K. Ito and D. Suzuki},
year = {2002},
doi = {10.1109/APCCAS.2002.1114926},
url = {http://dx.doi.org/10.1109/APCCAS.2002.1114926},
researchr = {https://researchr.org/publication/ItoS02},
cites = {0},
citedby = {0},
pages = {149-154},
booktitle = {IEEE Asia Pacific Conference on Circuits and Systems 2002, APCCAS 2002, Singapore, 16-18 December 2002},
publisher = {IEEE},
}