High speed bit-serial parallel processing on array architecture

Kazuhito Ito, Takenobu Shimizugashira, Hiroaki Kunieda. High speed bit-serial parallel processing on array architecture. In Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, Nippon Convention Center, Chiba, Japan, January 28-31, 1997. pages 667-668, IEEE, 1997. [doi]

Abstract

Abstract is missing.