An Efficient Hardware Implementation of a SAT Problem Solver on FPGA

Teodor Ivan, El Mostapha Aboulhamid. An Efficient Hardware Implementation of a SAT Problem Solver on FPGA. In 2013 Euromicro Conference on Digital System Design, DSD 2013, Los Alamitos, CA, USA, September 4-6, 2013. pages 209-216, IEEE, 2013. [doi]

@inproceedings{IvanA13,
  title = {An Efficient Hardware Implementation of a SAT Problem Solver on FPGA},
  author = {Teodor Ivan and El Mostapha Aboulhamid},
  year = {2013},
  doi = {10.1109/DSD.2013.31},
  url = {http://dx.doi.org/10.1109/DSD.2013.31},
  researchr = {https://researchr.org/publication/IvanA13},
  cites = {0},
  citedby = {0},
  pages = {209-216},
  booktitle = {2013 Euromicro Conference on Digital System Design, DSD 2013, Los Alamitos, CA, USA, September 4-6, 2013},
  publisher = {IEEE},
}