Multiple-Clock-Cycle Architecture for the VLSI Design of a System for Time-Frequency Analysis

Veselin N. Ivanovic, Radovan D. Stojanovic, Ljubisa A. Stankovic. Multiple-Clock-Cycle Architecture for the VLSI Design of a System for Time-Frequency Analysis. EURASIP J. Adv. Sig. Proc., 2006, 2006. [doi]

Abstract

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