Tsuyoshi Iwagaki, Takehiro Mikami, Hideyuki Ichihara, Tomoo Inoue. Utilizing register transfer level false paths for circuit optimization with a logic synthesis tool. In 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012, Kaohsiung, Taiwan, December 2-5, 2012. pages 615-618, IEEE, 2012. [doi]
@inproceedings{IwagakiMII12,
title = {Utilizing register transfer level false paths for circuit optimization with a logic synthesis tool},
author = {Tsuyoshi Iwagaki and Takehiro Mikami and Hideyuki Ichihara and Tomoo Inoue},
year = {2012},
doi = {10.1109/APCCAS.2012.6419110},
url = {http://dx.doi.org/10.1109/APCCAS.2012.6419110},
researchr = {https://researchr.org/publication/IwagakiMII12},
cites = {0},
citedby = {0},
pages = {615-618},
booktitle = {2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012, Kaohsiung, Taiwan, December 2-5, 2012},
publisher = {IEEE},
}