A New Test Generation Model for Broadside Transition Testing of Partial Scan Circuits

Tsuyoshi Iwagaki, Satoshi Ohtake, Hideo Fujiwara. A New Test Generation Model for Broadside Transition Testing of Partial Scan Circuits. In IFIP VLSI-SoC 2006, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Nice, France, 16-18 October 2006. pages 308-313, IEEE, 2006. [doi]

Authors

Tsuyoshi Iwagaki

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Satoshi Ohtake

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Hideo Fujiwara

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