A New Test Generation Model for Broadside Transition Testing of Partial Scan Circuits

Tsuyoshi Iwagaki, Satoshi Ohtake, Hideo Fujiwara. A New Test Generation Model for Broadside Transition Testing of Partial Scan Circuits. In IFIP VLSI-SoC 2006, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Nice, France, 16-18 October 2006. pages 308-313, IEEE, 2006. [doi]

@inproceedings{IwagakiOF06,
  title = {A New Test Generation Model for Broadside Transition Testing of Partial Scan Circuits},
  author = {Tsuyoshi Iwagaki and Satoshi Ohtake and Hideo Fujiwara},
  year = {2006},
  doi = {10.1109/VLSISOC.2006.313252},
  url = {http://dx.doi.org/10.1109/VLSISOC.2006.313252},
  tags = {testing},
  researchr = {https://researchr.org/publication/IwagakiOF06},
  cites = {0},
  citedby = {0},
  pages = {308-313},
  booktitle = {IFIP VLSI-SoC 2006, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Nice, France, 16-18 October 2006},
  publisher = {IEEE},
}