An energy-efficient FPGA-based soft-core processor with a configurable word size ECC arithmetic accelerator

Aiko Iwasaki, Yuichiro Shibata, Kiyoshi Oguri, Ryuichi Harasawa. An energy-efficient FPGA-based soft-core processor with a configurable word size ECC arithmetic accelerator. In 2015 IEEE Symposium in Low-Power and High-Speed Chips, COOL CHIPS XVIII, Yokohama, Japan, April 13-15, 2015. pages 1-3, IEEE, 2015. [doi]

@inproceedings{IwasakiSOH15,
  title = {An energy-efficient FPGA-based soft-core processor with a configurable word size ECC arithmetic accelerator},
  author = {Aiko Iwasaki and Yuichiro Shibata and Kiyoshi Oguri and Ryuichi Harasawa},
  year = {2015},
  doi = {10.1109/CoolChips.2015.7158664},
  url = {http://dx.doi.org/10.1109/CoolChips.2015.7158664},
  researchr = {https://researchr.org/publication/IwasakiSOH15},
  cites = {0},
  citedby = {0},
  pages = {1-3},
  booktitle = {2015 IEEE Symposium in Low-Power and High-Speed Chips, COOL CHIPS XVIII, Yokohama, Japan, April 13-15, 2015},
  publisher = {IEEE},
  isbn = {978-1-4673-7325-8},
}