Systolic array architecture for Gabor decomposition

Giridharan Iyengar, Sethuraman Panchanathan. Systolic array architecture for Gabor decomposition. IEEE Trans. Circuits Syst. Video Techn., 5(4):355-359, 1995. [doi]

Authors

Giridharan Iyengar

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Sethuraman Panchanathan

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