Giridharan Iyengar, Sethuraman Panchanathan. Systolic array architecture for Gabor decomposition. IEEE Trans. Circuits Syst. Video Techn., 5(4):355-359, 1995. [doi]
@article{IyengarP95-0,
title = {Systolic array architecture for Gabor decomposition},
author = {Giridharan Iyengar and Sethuraman Panchanathan},
year = {1995},
doi = {10.1109/76.465089},
url = {http://dx.doi.org/10.1109/76.465089},
researchr = {https://researchr.org/publication/IyengarP95-0},
cites = {0},
citedby = {0},
journal = {IEEE Trans. Circuits Syst. Video Techn.},
volume = {5},
number = {4},
pages = {355-359},
}