Multilevel Factorization Technique for Pass Transistor Logic - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

Arunita Jaekel, Graham A. Jullien, Subir Bandyopadhyay. Multilevel Factorization Technique for Pass Transistor Logic. In 9th International Conference on VLSI Design (VLSI Design 1996), 3-6 January 1996, Bangalore, India. pages 339-340, IEEE Computer Society, 1996. [doi]

This author has not been identified. Look up 'Arunita Jaekel' in GoogleThis author has not been identified. Look up 'Graham A. Jullien' in GoogleThis author has not been identified. Look up 'Subir Bandyopadhyay' in Google

runs on WebDSL