Design of the coarse-grained reconfigurable architecture DART with on-line error detection

Syed M. A. H. Jafri, Stanislaw J. Piestrak, Olivier Sentieys, Sébastien Pillement. Design of the coarse-grained reconfigurable architecture DART with on-line error detection. Microprocessors and Microsystems, 38(2):124-136, 2014. [doi]

Abstract

Abstract is missing.