Ankesh Jain, Maurits Ortmanns. Gain Mismatch Insensitive Time-Interleaved DAC for CT Delta Sigma Modulator by application of a Three-State DAC. In IEEE International Symposium on Circuits and Systems, ISCAS 2018, 27-30 May 2018, Florence, Italy. pages 1-5, IEEE, 2018. [doi]
Abstract is missing.