Memory Architecture Exploration for Power-Efficient 2D-Discrete Wavelet Transform

Rahul Jain, Preeti Ranjan Panda. Memory Architecture Exploration for Power-Efficient 2D-Discrete Wavelet Transform. In 20th International Conference on VLSI Design (VLSI Design 2007), Sixth International Conference on Embedded Systems (ICES 2007), 6-10 January 2007, Bangalore, India. pages 813-818, IEEE Computer Society, 2007. [doi]

@inproceedings{JainP07,
  title = {Memory Architecture Exploration for Power-Efficient 2D-Discrete Wavelet Transform},
  author = {Rahul Jain and Preeti Ranjan Panda},
  year = {2007},
  doi = {10.1109/VLSID.2007.103},
  url = {http://doi.ieeecomputersociety.org/10.1109/VLSID.2007.103},
  tags = {architecture},
  researchr = {https://researchr.org/publication/JainP07},
  cites = {0},
  citedby = {0},
  pages = {813-818},
  booktitle = {20th International Conference on VLSI Design (VLSI Design 2007), Sixth International Conference on Embedded Systems (ICES 2007), 6-10 January 2007, Bangalore, India},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-2502-4},
}